Technical Document
Specifications
Brand
NexperiaLogic Family
74LVT
Logic Function
D Type
Input Type
BiCMOS
Output Type
3 State
Output Signal Type
Single Ended
Triggering Type
Negative Edge, Positive Edge
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
48
Set/Reset
Reset
Number of Elements per Chip
16
Maximum Propagation Delay Time @ Maximum CL
5.6 ns @ 50 pF
Dimensions
12.6 x 6.2 x 1.05mm
Maximum Operating Supply Voltage
3.6 V
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
2.7 V
Maximum Operating Temperature
+85 °C
Propagation Delay Test Condition
50pF
Height
1.05mm
Width
6.2mm
Length
12.6mm
Product details
74LVT Family, Nexperia
Low-Voltage BiCMOS Technology Logic
Operating Voltage 2.7 to 3.6
Compatibility: Input LVTTL/TTL, Output LVTTL
74LVT Family
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SR 4.20
Each (In a Tube of 39) (ex VAT)
SR 4.83
Each (In a Tube of 39) (inc. VAT)
39
SR 4.20
Each (In a Tube of 39) (ex VAT)
SR 4.83
Each (In a Tube of 39) (inc. VAT)
39
Technical Document
Specifications
Brand
NexperiaLogic Family
74LVT
Logic Function
D Type
Input Type
BiCMOS
Output Type
3 State
Output Signal Type
Single Ended
Triggering Type
Negative Edge, Positive Edge
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
48
Set/Reset
Reset
Number of Elements per Chip
16
Maximum Propagation Delay Time @ Maximum CL
5.6 ns @ 50 pF
Dimensions
12.6 x 6.2 x 1.05mm
Maximum Operating Supply Voltage
3.6 V
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
2.7 V
Maximum Operating Temperature
+85 °C
Propagation Delay Test Condition
50pF
Height
1.05mm
Width
6.2mm
Length
12.6mm
Product details
74LVT Family, Nexperia
Low-Voltage BiCMOS Technology Logic
Operating Voltage 2.7 to 3.6
Compatibility: Input LVTTL/TTL, Output LVTTL