Technical Document
Specifications
Brand
NexperiaLogic Family
74LVC
Logic Function
Bus Transceiver
Number of Elements per Chip
2
Number of Channels per Chip
16
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
48
Input Level
CMOS
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
13.8ns
Width
6.2mm
Minimum Operating Temperature
-40 °C
Dimensions
12.6 x 6.2 x 1.05mm
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
12.6mm
Maximum Operating Supply Voltage
3.6 V
Height
1.05mm
Country of Origin
China
Product details
74LVC Family Bus Transceivers, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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SR 2.58
Each (On a Reel of 2000) (ex VAT)
SR 2.967
Each (On a Reel of 2000) (inc. VAT)
2000
SR 2.58
Each (On a Reel of 2000) (ex VAT)
SR 2.967
Each (On a Reel of 2000) (inc. VAT)
2000
Technical Document
Specifications
Brand
NexperiaLogic Family
74LVC
Logic Function
Bus Transceiver
Number of Elements per Chip
2
Number of Channels per Chip
16
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
48
Input Level
CMOS
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
13.8ns
Width
6.2mm
Minimum Operating Temperature
-40 °C
Dimensions
12.6 x 6.2 x 1.05mm
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
12.6mm
Maximum Operating Supply Voltage
3.6 V
Height
1.05mm
Country of Origin
China
Product details
74LVC Family Bus Transceivers, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS