Technical Document
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Buffer
Number of Channels
1
Schmitt Trigger Input
No
Input Type
Single Ended
Output Type
3 State
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SC-74A
Pin Count
5
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
10.5ns
Maximum Operating Supply Voltage
5.5 V
Dimensions
3.1 x 1.7 x 1mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
3.1mm
Height
1mm
Width
1.7mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
SR 25.00
SR 0.25 Each (In a Pack of 100) (ex VAT)
SR 28.75
SR 0.288 Each (In a Pack of 100) (inc. VAT)
Standard
100
SR 25.00
SR 0.25 Each (In a Pack of 100) (ex VAT)
SR 28.75
SR 0.288 Each (In a Pack of 100) (inc. VAT)
Stock information temporarily unavailable. please contact rs@ae.com.sa for more details.
Standard
100
Stock information temporarily unavailable. please contact rs@ae.com.sa for more details.
Technical Document
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Buffer
Number of Channels
1
Schmitt Trigger Input
No
Input Type
Single Ended
Output Type
3 State
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SC-74A
Pin Count
5
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
10.5ns
Maximum Operating Supply Voltage
5.5 V
Dimensions
3.1 x 1.7 x 1mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
3.1mm
Height
1mm
Width
1.7mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS