Technical Document
Specifications
Brand
NexperiaLogic Family
74LVC
Logic Function
D Type
Input Type
Single Ended
Output Type
TTL
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
5
Number of Elements per Chip
1
Maximum Propagation Delay Time @ Maximum CL
8 ns@ 50 pF
Maximum Operating Supply Voltage
5.5 V
Dimensions
2.25 x 1.35 x 1mm
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
2.25mm
Height
1mm
Width
1.35mm
Product details
74LVC Family Flip-Flops & Latches, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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SR 1.59
Each (In a Pack of 75) (ex VAT)
SR 1.828
Each (In a Pack of 75) (inc. VAT)
Standard
75
SR 1.59
Each (In a Pack of 75) (ex VAT)
SR 1.828
Each (In a Pack of 75) (inc. VAT)
Standard
75
Technical Document
Specifications
Brand
NexperiaLogic Family
74LVC
Logic Function
D Type
Input Type
Single Ended
Output Type
TTL
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
5
Number of Elements per Chip
1
Maximum Propagation Delay Time @ Maximum CL
8 ns@ 50 pF
Maximum Operating Supply Voltage
5.5 V
Dimensions
2.25 x 1.35 x 1mm
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
2.25mm
Height
1mm
Width
1.35mm
Product details
74LVC Family Flip-Flops & Latches, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS