Technical Document
Specifications
Brand
NexperiaLogic Function
Inverter
Output Type
Open Drain
Number of Elements per Chip
6
Schmitt Trigger Input
No
Maximum Propagation Delay Time @ Maximum CL
5 ns @ 50 pF
Maximum Low Level Output Current
32mA
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
14
Logic Family
LVC
Dimensions
5.1 x 4.5 x 0.95mm
Maximum Operating Supply Voltage
5.5 V
Height
0.95mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
5.1mm
Width
4.5mm
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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Please check again later.
SR 0.92
Each (Supplied in a Tube) (ex VAT)
SR 1.058
Each (Supplied in a Tube) (inc. VAT)
Production pack (Tube)
32
SR 0.92
Each (Supplied in a Tube) (ex VAT)
SR 1.058
Each (Supplied in a Tube) (inc. VAT)
Production pack (Tube)
32
Technical Document
Specifications
Brand
NexperiaLogic Function
Inverter
Output Type
Open Drain
Number of Elements per Chip
6
Schmitt Trigger Input
No
Maximum Propagation Delay Time @ Maximum CL
5 ns @ 50 pF
Maximum Low Level Output Current
32mA
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
14
Logic Family
LVC
Dimensions
5.1 x 4.5 x 0.95mm
Maximum Operating Supply Voltage
5.5 V
Height
0.95mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
5.1mm
Width
4.5mm
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS